SPI-4.2 is a version of the System Packet Interface published by the Optical Internetworking Forum. It was designed to be used in systems that support OC-192 SONET interfaces and is sometimes used in 10 Gigabit Ethernet based systems.

A typical application of SPI-4.2 is to connect a framer device to a network processor. It has been widely adopted by the high speed networking marketplace.

The interface consists of (per direction):
* sixteen LVDS pairs for the data path
* one LVDS pair for control
* one LVDS pair for clock at half of the data rate
* two FIFO status lines running at 1/8th of the data rate
* one status clock

The clocking is Source-synchronous and operates around 700 MHz. Implementations of SPI-4.2 have been produced which allow somewhat higher clock rates. This is important when overhead bytes are added to incoming packets.

PMC-Sierra made the original OIF contribution for SPI-4.2. That contribution was based on the PL-4 specification that was developed by PMC-Sierra in conjunction with the SATURN Development Group.

The physical layer of SPI-4.2 is very similar to the HyperTransport 1.x interface, although the logical layers are very different.

External links

* [http://www.oiforum.com/public/impagreements.html OIF Interoperability Agreements]

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