Memory Type Range Registers
Memory Type Range Registers (MTRRs) are
control registers that provide system softwarewith control of how accesses to memory ranges by the CPUare cached. It uses a set of programmable model-specific registers (MSRs) which are special registers provided by most modern CPUs.
Possible access modes to memory ranges can be:
Additional bits which are provided on some
computer architectures such as AMD64allow the shadowing of ROM contents in system memory(Shadow ROM) and the configuration of memory-mapped I/O.
In write-back mode, writes are written to the
CPU's cache and the cache is marked dirty, so that its contents are written to memory later.
Write-combining allows bus write transfers to be combined into a larger transfer before bursting them over the busto allow more efficient writes to system resources like
graphics cardmemory.This often increases the speed of image write operations by 2.5 times, at the cost of losing the simple sequential read/write semantics of normal memory.
x86 architecturesystems, especially where the cachewas provided by separate chips outside of the CPU package, this function was controlled by the chipsetitself and configured through BIOSsettings.
When the CPU cache was moved inside the CPU, the CPUs implemented "fixed-range MTRRs" ranges which cover the first megabyte of memory to be compatible to what PC-BIOSes provided at that time. These are used to control the cache policy needed for
VGAaccesses and all other memory-accesses done while the system is in real mode. Above the first MiB, CPUs provide a number of "variable-range MTRRs", which can be freely placed and even overlap. These variable-range MTRRs can be used to set the caching-policy of graphics memory and other memory ranges used by PCI devices.
Starting with the
IntelP6 family processors ( Pentium Pro, Pentium IIand later), MTRR's may be used to control the processor access to memory ranges.
Cyrix 6x86, 6x86MXand MII processors have Address Range Registers(ARRs) which provide a similar functionality to MTRRs.
AMD K6-2(stepping 8 and above) and K6-IIIprocessors have two MTRRs. The AMD Athlonfamily provide 8 Intel style MTRRs.
The Centaur C6
WinChiphas 8 MCRs, allowing write-combining.
Cyrix IIIand VIA C3CPUs offer 8 Intel style MTRRs.
The memory interface of AMD K8 CPUs supports "Extended fixed-range MTRR Type-Field Encodings" which allow to specify whether accesses to certain address ranges are executed by accessing
RAMthrough the Direct Connect Architectureor by executing memory-mapped I/O. This allows e.g. to implement Shadow RAM by copying ROM contents into RAM.
Details on how MTRRs work in detail are described in the processor manuals from CPU vendors.
* [http://www.meduna.org/txt_mtrr_en.html Speeding up graphics with MTRR] includes technical explanation
* [http://www.amd.com/gb-uk/Processors/TechnicalResources/0,,30_182_739_7044,00.html AMD64 Architecture Programmer's Manual Volume 2: System Programming] (
* [http://www.intel.com/products/processor/manuals/index.htm Intel 64 and IA-32 Architectures Software Developer's Manuals] See "Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide" section 10.11 "MEMORY TYPE RANGE REGISTERS (MTRRS)"
Wikimedia Foundation. 2010.
Look at other dictionaries:
Memory Type Range Registers — … Википедия
Memory type range register — Memory type range registers (MTRRs) are a set of processor supplementary capabilities control registers that provide system software with control of how accesses to memory ranges by the CPU are cached. It uses a set of programmable model specific … Wikipedia
Memory management unit — This 68451 MMU could be used with the Motorola 68010 A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware component responsible for handling accesses to memory requested by the CPU. Its… … Wikipedia
Flash memory — Computer memory types Volatile RAM DRAM (e.g., DDR SDRAM) SRAM In development T RAM Z RAM TTRAM Historical Delay line memory Selectron tube Williams tube Non volatile … Wikipedia
Static random access memory — (SRAM) is a type of semiconductor memory where the word static indicates that, unlike dynamic RAM (DRAM), it does not need to be periodically refreshed, as SRAM uses bistable latching circuitry to store each bit. SRAM exhibits data remanence,cite … Wikipedia
Processor register — In computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are (typically) addressed by mechanisms other than main memory and can be accessed more quickly.… … Wikipedia
CPUID — The CPUID opcode is a processor supplementary instruction (its name derived from CPU IDentification) for the x86 architecture. It was introduced by Intel in 1993 when it introduced the Pentium and SL Enhanced 486 processors. By using the CPUID … Wikipedia
Page Attribute Table — The Page Attribute Table (also know as Page Allocation Table) is an extension to the page table format of certain x86 and x86 64 microprocessors. Like Memory Type Range Registers (MTRRs), they allow for fine grained control over how areas of… … Wikipedia
Model-specific register — Model specific registers (MSRs) are control registers provided by processor implementations to provide system software with features that are provided on specific processor implementations, but not others. MSRs are used for performance monitoring … Wikipedia
MTRR — MTRRs (Memory type range registers Диапазонные регистры типа памяти) используются для назначения типа (политики кеширования) участкам памяти. Регистры MTRR предоставляет механизм связывающий типы памяти с физическими адресными… … Википедия